Some semiconductor memory devices, such as NAND-type electrically erasable programmable read-only memories (EEPROMs), may include a three-dimensional memory cell array in which memory cells are three-dimensionally arrayed. Such a memory cell array includes a stacked body in which conductive layers, which serve as word lines, and insulating layers are alternately stacked. To enable a contact plug to be connected to each conductive layer of the stacked body, a side of the stacked body is processed in a staircase pattern.